Common hardware computing platforms include CPU, GPU, ASIC and FPGA. What is a high-performance programmable chip that can implement multiple processing units to execute different instruction streams simultaneously? (Multiple choice)

• A.ASIC
• B.FPGA
• C.GPU
• D.CPU

Comment: *

Name: *

Email: *

Verification: *

A company plans to port the C language from the X86 platform to the Kunpeng platform. This process involves the compilation of gcc. Which of the following are part of the gcc compilation process? (Multiple choice)

• A.Compile
• B.Link
• C.Pretreatment
• D.Assembly

Comment: *

Name: *

Email: *

Verification: *

Project A wants to view the capacity, voltage, frequency, etc. of the memory operation, which of the following way can be used to view? (Multiple choice)

• A.Query through Dmidecode memory under Linux
• B.Log in to iBMC to view.
• C.By SOL serial (using function storage system Windows under IPMItool tool, the configuration BMC IP and BMC password, the connection server BMC network, save serial log), search for "DDR3-a" or "DDR4-" to
• D.View basic information through BIOS

Comment: *

Name: *

Email: *

Verification: *

Microprocessor commonly used instruction sets include simplified instruction set, complex instruction set, display parallel instruction set, etc. Which of the following statements about instruction set is correct? (Multiple choice)

• A.In a complex instruction set microprocessor, each instruction of the program is executed serially in order, and each operation in each instruction is also executed serially in order.
• B.Ultra-long instruction set puts multiple instructions into one instruction word, which effectively improves the utilization efficiency of each computing function component of the CPU and improves the performance of the program.
• C.Simplified instruction set has simplified the number of instructions and addressing methods to make it easier to implement, the degree of parallel execution of instructions is better, and the efficiency of the compiler is higher.
• D.Displaying parallel instructions allows the processor to execute instructions in parallel according to the compiled schedule without increasing hardware complexity. The architecture is developed from the ultra-long instruction set architecture and has been greatly improved.

Comment: *

Name: *

Email: *

Verification: *

The applicable scenario of the TaiShan server SSL acceleration solution is to accelerate the asymmetric encryption of the TLS handshake, mainly to uninstall the RAS1024 algorithm.

• A.False
• B.True

Comment: *

Name: *

Email: *

Verification: *